Signals from 3 transducers are to be recorded in data logger.The analogue signal supplied by the three transducers are dual polarity (-50 mv to +50 mv) having frequency is 5 KHz 10 KHz and 15 KHz. Explain the design of the following steps of the data logger.

1. Input scanner off the data logger such that it can appropriately sample the incoming signals [3]
   
2. Signal conditioner of stages if the 8 bit ADC used inside the data logger accepts only positive polarity signals ranging from 0 volt to 5 volts.

Figure drawn above assists the explanations.

Explanation of the design of input scanner :- 

The highest frequency amongst the input signal is 15 KHz. Using Nyquist criteria the sampling rate
should be 30KHz. The programmer periodically scans all these three inputs for a particular time and the scan signal are fed to the next stage.

Explanation of the design of signal conditioner :- 

As given in question transducers polarity varies from - 50mV to +50mV but the ADC used can only accept positive polarity signals so this transducer signals must be biased at appropriate DC level. We maintain this level at 2.5V using and OP-amp virtual ground concept. This raises the reference ground at 2.5 volts virtual ground and assists proper analogue to digital conversion. An IC named TLE2425 can be used to generate 2.5 DC volt by providing it 5 volt dc.